Many circuits involve the use of what is known as a Baliga-pair (i.e., cascode/composite device) to perform switching during operation. FIG. 1A is a schematic diagram illustrating one of these cascode devices. A cascode/composite device 101 comprises a low-voltage normally-off device 105 in series with a high-voltage normally-on device 103. Hereinafter, cascode device, composite device, and package will be used interchangeably to describe the above mentioned device. The low-voltage normally-off device 105 includes a gate 107, source 111, and drain 109. By way of example, and not by way of limitation, the low-voltage device may be a metal-oxide-semiconductor field effect transistor (MOSFET). The high-voltage normally-on device 103 also includes a gate 113, a source 117, and a drain 115. By way of example, and not by way of limitation, the high-voltage normally-on device may be a junction gate field-effect transistor (JFET) or a hetero structure field effect transistor (HFET). The gate 113 of the high-voltage normally-on device 103 is electrically connected to the source 111 of the low-voltage normally-off device 105, and the source 117 of the high-voltage normally-on device 103 is electrically connected to the drain 109 of the low-voltage normally-off device 105. For purposes of example, the following description will involve a MOSFET connected in series with a JFET.
The cascode device functions as a single switching device when implemented within a circuit scheme. When no gate bias is applied to the MOSFET 105, the device 101 cannot conduct current because voltage builds up across the low voltage MOSFET 105, reverse biasing the gate of the normally-on JFET 103. The application of positive voltage to the drain 117 of the JFET 103 appears directly on the drain of the low voltage FET, and this reverse biases its gate 113. Once the reverse bias is sufficient to pinch of the JFET 103, all the further applied voltage is supported by the high voltage JFET between its drain and source. When a positive voltage is applied to the MOSFET gate 107, with respect to the source 111, the MOSFET 105 turns on. This short circuits the gate 113 of the JFET to the source 117 of the JFET and allows current flow from the source 117 of the JFET to the drain 115 of the JFET, since the potential barrier has been removed.
Certain characteristics exhibited by the cascode/composite device are not ideal. It is within this context that embodiments of the present invention arise.